1. Field of the Invention
The present invention relates to a digital-analog converter, and more particularly, to a training circuit and method of a digital-analog converter and an analog-digital converter.
2. Description of the Related Art
Modern portable electronic devices, such as personal digital assistants (PDAs), cellular phones or electronic translators, have touch screens for a writing-data input mode. Touch screens use analog-digital converters to transfer the analog signals inputted by writing into digital signals, which are then processed by processors.
Circuits of analog-digital converters comprise digital-analog converters, which is constituted by parallel capacitors. With the increasing of bits of electronic devices, the capacitance required of the capacitors in the digital-analog converter also rises. High capacitance, however, brings in bad resolution of the analog-digital converter. In order to maintain the resolution of the analog-digital converter, correcting capacitors, which are parallel connected to the existing capacitors, are added in the circuit of the digital-analog converter. After a training process, the required number of the correcting capacitors can be obtained.
FIG. 1 is a schematic drawing showing a capacitance-correcting circuit of a conventional digital-analog converter. As shown in FIG. 1, within the limitation of the resolution, the capacitance of the parallel capacitors has a geometric-series relationship, such as C, 2C, 22C, . . . 27C. If the capacitance of the capacitor is too high, a set of parallel correcting capacitors 104 is series connected thereto, and then the capacitor 100, which has a descending geometric series relationship, is parallel connected thereto. The capacitor 100 is parallel coupled to the correcting capacitors 102. After the training process, the required number of the correcting capacitors 102 is obtained by a trial-and-error method. The routes of the redundant correcting capacitors are fused by laser or other methods.
When the number of the capacitors 100 increases, the time required for the trial-and-error method is long. In addition, the fusing location X for the correcting capacitors is predetermined during the fabrication process. If the fabrication process is unstable, the yield of the digital-analog converters will decline and the manufacturing costs will increase.